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Diffusion & Implant Daily Abbreviations

擴散與佈植每天會用到的縮寫
共 13 個字
— 縮寫表 · 共 13 個字 —
ImplantIon Implantation
念整個字「ɪmˈplænt」· /ɪmˈplænt/
離子佈植 — 把 dopant 離子加速打進 wafer。現代摻雜的主要方式。
Source/drain implant for this device runs at 10 keV.
DoseImplant Dose
念整個字「doʊs」· /doʊs/
劑量 — 每 cm² 打進去的離子數,單位 atoms/cm²。決定濃度。
Dose target is 5E14, monitor shows 4.8E14 — within ±5% spec.
EnergyImplant Energy
念整個字「ɛnərdʒi」· /ˈɛnərdʒi/
佈植能量 — 離子加速能量,keV。決定打進去多深。
Use lower energy for shallower junction — needed at advanced nodes.
DopantDopant
念整個字「doʊpənt」· /ˈdoʊpənt/
雜質元素 — 加進矽改變導電性的元素,常見 As、P(N 型)、B(P 型)。
Dopant of choice for source/drain is arsenic at 28nm.
AnnealAnneal
念整個字「əˈniːl」· /əˈniːl/
退火 — 高溫處理讓 implant 後的矽晶格重組 + dopant 進入正確晶格位置。
Post-implant anneal at 1050°C for 5 seconds.
RTARapid Thermal Anneal
字母分開念:R-T-A· /ɑːr tiː eɪ/
快速熱退火 — 短時間(秒級)加熱到 1000°C+,精準控制 dopant profile。
RTA non-uniformity is 5°C across wafer — Vt shift on edge.
RTPRapid Thermal Processing
字母分開念:R-T-P· /ɑːr tiː piː/
快速熱處理 — RTA 的廣義版,泛指各種快速熱步驟。
Move this RTP step before the metal deposition.
JunctionJunction (P-N Junction)
念整個字「dʒʌŋkʃən」· /ˈdʒʌŋkʃən/
接面 — N 型與 P 型接觸的邊界,電晶體的核心。
Shallow junction target is 20 nm — hard to hit at this energy.
WellWell (P-Well / N-Well)
念整個字「wɛl」· /wɛl/
井區 — 大塊 N 型或 P 型矽區域,放電晶體的「池子」。
P-well implant is doing the deep retrograde profile.
VtThreshold Voltage
字母分開念:V-T,有時念「V sub T」· /viː tiː/
閾值電壓 — 電晶體開啟所需的 gate 電壓。Vt 偏移直接代表 dopant 出問題。
Vt drifted +50 mV — likely dopant under-dose.
TiltImplant Tilt Angle
念整個字「tɪlt」· /tɪlt/
傾斜角 — wafer 與離子束的傾角,通常 7° 防 channeling。
Tilt drift on implanter Y caused asymmetric Vt across wafer.
ChannelingChanneling
念整個字「tʃænəlɪŋ」· /ˈtʃænəlɪŋ/
通道效應 — 離子沿矽晶格通道射入造成異常深的 dopant 分布。要靠 tilt 防。
SIMS shows channeling tail — tilt angle drifted.
HaloHalo Implant
念整個字「heɪloʊ」· /ˈheɪloʊ/
暈環佈植 — 在 source/drain 周圍打反向 dopant 抑制 short-channel 效應。
Halo implant is the secret sauce for sub-100nm devices.
動詞搭配 · Verb Collocations · 共 8 條 —
Vt shifts by N mVVt / threshold voltage + shifts / drifts / climbs by [N] mV

閾值電壓偏移 N mV。Vt shift 是 implant 部門最頻繁的 yield 訊號 — 通常 ±20 mV 就要追。

  • Vt shifted +50 mV on N-channel — likely halo dose drift.
  • Vt drifted by -30 mV across the wafer center — RTA non-uniform.
dose drifts / is under-spec / is over-specdose + drifts / is under-spec / is over-spec / monitors low

劑量飄移 / 不足 / 超量。Dose 在 ±5% spec 內,monitor wafer 跑出來不對就要回 chamber。

  • Dose monitor shows 4.5E14 — target is 5E14, under-spec by 10%.
  • Dose drifted on implanter Y after the source replacement — re-cal needed.
energy is dialed up / down / tunedenergy + is dialed up / dialed down / tuned

佈植能量被拉高 / 降低 / 調整。Lower energy = shallower junction,先進節點主要趨勢。

  • Energy was dialed down from 12 keV to 8 keV for the new shallow junction.
  • Energy tuned to 35 keV for the deep well — channeling avoided with 7° tilt.
anneal recovers / activates / damagesanneal / RTA + recovers / activates / damages

退火復原(晶格)/ 活化(dopant)/ 損傷(過熱)。Anneal 三大功能要記住。

  • RTA at 1050°C activates the dopant; below 950°C activation drops.
  • Over-anneal damages the silicide — keep RTA peak under 1100°C.
tilt angle driftstilt + drifts / is set / is verified

傾斜角飄移 / 設定 / 驗證。Tilt 偏 0.5° 就會引入 channeling tail。

  • Tilt drifted from 7° to 6.2° on implanter Y — asymmetric Vt across wafer.
  • Tilt verified at 7° ±0.1° after the recent mechanical alignment.
channeling shows up / is suppressedchanneling + shows up / is suppressed / dominates

通道效應出現 / 被抑制 / 主導。SIMS profile 看到 deep tail 就是 channeling。

  • Channeling shows up as a deep tail in the SIMS profile.
  • Channeling suppressed after restoring the 7° tilt.
junction goes shallow / deepjunction + goes shallow / deep / abrupt / graded

接面變淺 / 深 / 陡 / 緩。先進節點要 ultra-shallow junction(USJ)。

  • Junction goes shallow with lower energy and faster anneal.
  • Junction depth drifted deeper after the RTA temperature drift.
implant is monitored / tested / qualifiedimplant + is monitored / tested / qualified / re-cal'd

佈植被監測 / 測試 / 認證 / 重新校正。Implanter 每幾小時要跑 monitor wafer。

  • Source/drain implant is monitored every 4 hours via 4-point probe.
  • Implanter Y re-cal'd after dose drift; qualified with 5 monitor wafers.
句型 · Sentence Patterns · 共 5 條 —

8D · Vt excursion

Vt shift of N mV on device is attributed to root_cause, confirmed by evidence.

{元件} 的 Vt 偏移 {N} mV 歸因於 {根因},以 {證據} 確認。Implant 8D D4 標準寫法。

  • Vt shift of +50 mV on N-channel is attributed to halo dose under-shoot on implanter Y, confirmed by dose monitor and SIMS profile.
  • Vt shift of -30 mV on P-channel is attributed to RTA temperature non-uniformity in the wafer center, confirmed by pyrometer mapping.

RTA tool report

RTA non-uniformity on chamber: N°C across wafer; recommend action.

{腔體} 的 RTA 不均勻度:全片 {N}°C 差;建議 {動作}。

  • RTA non-uniformity on chamber A: 5°C across wafer; recommend hold and re-cal the pyrometer array.
  • RTA non-uniformity on chamber B: 2.1°C across wafer; recommend monitor next 10 lots.

SIMS investigation · implant

SIMS shows channeling tail at depth; action to bring tilt back to target.

SIMS 顯示在 {深度} 處有 channeling tail;{動作} 將 tilt 修正到 {目標}。

  • SIMS shows channeling tail at 80 nm; re-aligning the chuck to bring tilt back to 7° ±0.1°.
  • SIMS shows channeling tail at 120 nm; replacing the worn chuck encoder to bring tilt back to spec.

implanter qualification

After the dose drift on implanter, monitor wafers re-qualified the tool; target dose hit within tolerance.

{機台} 的劑量飄移後,monitor wafer 重新認證機台;目標 {劑量} 達成,容差 {tolerance}。

  • After the dose drift on implanter Y, monitor wafers re-qualified the tool; target 5E14 hit within ±2%.
  • After the dose drift on implanter X, monitor wafers re-qualified the tool; target 1E15 hit within ±3%.

PIE / implant disposition

Recommend action on lot_id: N wafers under check pending next_step.

建議對 {批號} 採取 {動作}:{N} 片受 {檢查},等待 {下一步}。

  • Recommend hold on lot Q3-218: 24 wafers under SIMS check pending Vt measurement.
  • Recommend release on lot 1842: 25 wafers under 4PP monitor pending PCM data confirmation.
真實場景 · Real Scenarios · 共 3 條 —

Email — Vt Shift Investigation

Implant 工程師發給 PIE + PQA,Vt shift 觸發 SPC alarm,要 root cause 報告。

Subject: [UPDATE] N-channel Vt shift investigation on lots Q3-218 ~ Q3-221

Hi all,

Quick update on the Vt excursion that SPC tagged on Monday.

Symptom: N-channel Vt shifted +50 mV on lots Q3-218 through Q3-221, all running the same FEOL flow.

Investigation so far:
- All 4 lots ran the halo implant on implanter Y between 03/10 and 03/12.
- Dose monitor on implanter Y shows a slow drift: target 1E13, monitor read 8.5E12 (15% under-spec).
- Source filament had aged beyond the recommended replacement window — filament changed last on 02/01.

Root cause (preliminary): aged filament caused source ionization efficiency to drop, resulting in under-dosing.

Containment:
- Implanter Y held for filament replacement.
- 4 affected lots held at WAT.
- Will run 5 monitor wafers post-filament-swap to confirm dose recovery.

Will share confirmed RCA + 8D draft by Friday.

Thanks,
Implant ENG

相關縮寫:Vt · dose · SPC · WAT

Conf Call — RTA Non-Uniformity Update

PIE 主持 FEOL yield review,Diff/Implant lead 解釋 RTA 不均勻造成的 Vt 變異。

Thanks. Quick recap on RTA non-uniformity on the source/drain anneal step.

We saw asymmetric Vt across wafer center vs edge on the last 5 lots — center -25 mV vs edge baseline. Effect is consistent, only on chamber A of the RTA cluster.

Investigation:
- Pyrometer mapping confirms 4.5°C non-uniformity peak-to-peak, center cooler.
- Quartz window inspection revealed surface clouding from cumulative wafer cycles — heat reflection back to the wafer reduced.
- Maintenance log shows quartz window last replaced 8 months ago, exceeding the 6-month spec.

Root cause: aged quartz window on chamber A causing non-uniform thermal coupling.

Containment: chamber A held; quartz window replaced last night; re-qualified with 5 monitor wafers — non-uniformity back to 1.8°C across wafer.

Long-term: quartz window replacement interval tightened from 6 months to 4 months; added a quarterly clarity inspection.

5 lots affected. All hold at WAT. Dose monitor was fine, so this is RTA-only.

Open to questions.

相關縮寫:RTA · Vt · WAT · PIE

Deviation Report — Channeling Tail (Section 4)

SIMS 量測發現 channeling tail,Implant 部門寫的 deviation report Section 4。

4.0 Root Cause — Channeling Tail on Source/Drain Implant

4.1 Symptom
SIMS depth profile on the source/drain extension implant shows a channeling tail extending 70 nm beyond the design profile (target deep extent 45 nm). Effect appears on all wafers from implanter Y during a 3-day window.

4.2 Investigation Path
- Tool log inspection: tilt angle encoder on implanter Y chuck shifted from 7.0° to 6.2° on 03/11 — suspected mechanical wear in the encoder gearing.
- Maintenance history: encoder last calibrated 11 months ago vs 12-month service interval — within window but at the edge.
- SIMS on monitor wafer post-encoder-realignment confirms profile back to design (tail < 50 nm).

4.3 Root Cause Statement
The channeling tail is attributed to tilt encoder mechanical drift on implanter Y dropping the tilt angle from 7° to 6.2°, allowing channeling along the silicon ⟨110⟩ direction, confirmed by SIMS profile, encoder log, and post-realignment validation.

4.4 Containment
- All wafers from implanter Y during the affected 3-day window held at WAT (12 lots, ~300 wafers).
- Tilt encoder realigned and recalibrated.
- Monitor wafer profile validated; tool re-released.

4.5 Long-Term Action
- Tilt encoder calibration interval tightened from 12 to 9 months.
- Daily tilt verification step added to implanter SOP for all tilt-sensitive recipes (halo, extension).
- FMEA updated to include "tilt encoder mechanical drift" as a critical failure mode for implant tools.

相關縮寫:SIMS · tilt · channeling · WAT · FMEA · SOP

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